I used the spectroscopic ellipsometer to measure several wafers deposited using the AJA system. I verified film uniformity as well as film quality using index of refraction as the metric. The term “w/ Bias” refers to an applied RF power…
I used the spectroscopic ellipsometer to measure several wafers deposited using the AJA system. I verified film uniformity as well as film quality using index of refraction as the metric. The term “w/ Bias” refers to an applied RF power…
Chris and I visited the AJA sputter company in Boston last week. The tool was fully functional and we were able to deposit several test wafers. Overall, we were impressed with the performance. The uniformity across a 6″ substrate was…
Last week, we reported that it was possible to anneal membranes after they had been etched. Below is a summary of results from membranes that were annealed over a range of temps and under different conditions. w600 (20 nm oxide)…
Below are images from two samples that were annealed at 950 C and 1050 C post-EDP etch. The lower temp anneal produced a membrane with many features that do not seem to penetrate the nc-Si. There were a few (couple…
Inspired by JP, we decided to try to etch amorphous (unannealed) wafers this week to see if pinhole density changed. To my surprise, the amorphous membranes had no pinholes! Furthermore, I tried to anneal the membranes after the etch and…
Here’s the latest news from the production front: We are still struggling with the pinhole issue. Last week, Chris and JP tried a matrix of conditions to try to eliminate the particle contamination. Efforts included using the CO2 snow cleaner…
Wafers 525 & 527 have a 1000 Å dry thermal oxide mask with all three films on the frontside sputtered. Both these wafers had a high density of pinholes. The pores are also irregular in shape and seem to have…
Last week’s production yielded two wafers (502 & 504) with defect-free membranes. 506 had a high pinhole density. These wafers have a TEOS mask and were annealed twice; the first anneals did not produce pores so they were annealed again…
Last week I etched three wafers of different silicon thicknesses (10 nm, 15 nm, 20 nm). All the wafers had a TEOS mask with the standard three layer sputtered film on the front. Not that surprising is the fact that…