I don’t think I ever posted it on the blog, but two years ago I discovered something neat. At the time, I was trying to make my nanofluidic transistor, and I was reading Marina’s thesis. She tried to improve the…
I don’t think I ever posted it on the blog, but two years ago I discovered something neat. At the time, I was trying to make my nanofluidic transistor, and I was reading Marina’s thesis. She tried to improve the…
Two years ago (blog post), I asked Professor McAleavey to help me see if we could use NPN chips to generate ultrasound. I’d found a paper (An exact solution of AC electro-kinetic-driven flow in a circular micro-channel) that suggested, given the…
I’ve been trying to make the following device work for the past few years: The people who have been studying this have been trying to use the phenomena to mix solutions, or using arrays of mismatched electrodes to generate a…
I’ve been working hard on my model paper for a few months now. My first attempt at doing separations with Track Etched (TE) membranes, which are all 6um thick and come in pore sizes of either 30 nm or 50 nm,…
We’ve known for some time that the sieving coefficient of our membranes changes over time. The reason for this is that at the start of the separation the concentration just above the membrane is the same as the bulk concentration, but as more…
In my earlier posts, as well as in Josh’s NPN paper and Tom’s ACS nano paper, we’ve talked a lot about the resolutions of nanoparticle separations. What we mean by it is how well the membrane is able to discriminate between…
After correcting a minor error in my code that was giving me some weird limiting behavior, and optimizing the code to give me faster results, I generated the following curves: Note that, as experiment predicts, the ‘sharpness’ of the graph…
The below figure has three different sieving curves. Solid lines are model calculations assuming a SiN membrane with 37 nm pores, and either 0.4, 1.3, or 5 PSI applied to drive the separation. Markers are real data. Note that the…
I made a size ladder of ALD-ed chips. The chips I began with were ~35 nm average pore size, and I applied 2, 5, 7, 10, and 12 nm of alumina using the ALD in UR nano. This does represent…