Barrett had discovered that growing endothelial cells on pnc-si or tranwells causes vacuoles to form. The vacuoles on pnc-si formed only on the free standing areas of the membrane where there are open pores. The background on pnc-si chips showed…
Barrett had discovered that growing endothelial cells on pnc-si or tranwells causes vacuoles to form. The vacuoles on pnc-si formed only on the free standing areas of the membrane where there are open pores. The background on pnc-si chips showed…
I repeated a previous experiment but this time I used samples (no RTP) from W685 in oven @ 37C in DMEM(-FBS). Four type of samples (blank chip with no slits, chip with both intact membranes, chip with one intact membrane…
We have known, W683: no visible pores; W684: very few pores; W685: usual porosity. After Vlassak’s view on discoloration, I took samples from above wafers to check if any difference in discoloration can be seen as they have different porosities.…
In an earlier post we saw that intact membrane sample discolored slower than the broken one. To establish this, a study using four types of samples from #702 (blank chip with no slits, chip with both intact membranes, chip with…
I carried out the bead assay to monitor membrane integrity in Sepcon format. The sample (no RTP) was taken from #703 and put in DMEM(-FBS) @ RT with membrane side facing up. 15um polystyrene beads were allowed to settle on…
Based on Barrett’s array set up for discoloration, I set up an array experiment to check the discoloration effects between the new and old system ( 2e-7,AJA vs the older 7e-7 CVC ). The wafers from each had a bit…
We have seen before that in petri dishes, flipped samples (well side up) discolor faster as compared to the ‘membrane side up’ samples. This could be due to local environment trapped below the chip. Hence, I used Sepcon format so…
I repeated the experiment with samples from #703. Two samples were in a dish with one flipped over. Again, the ‘well side up’ sample (flipped) discolored earlier as seen in the 24 hour time point in the figure below.
We have seen that discoloration of chips is slower in Sepcons and this has been speculated to be because of the separation between the ‘well side’ and the ‘membrane side’ of the chip existing in the Sepcon format. To further…
Last week, Lingyun and I deposited 30nm SiO2 onto both sides of wafers 335, 341 and 345. Unfortunately, these wafers weren’t in too good shape, so there are only a few intact slits without pinholes. I then took a few…
